Two decades of research culminates in 3D stacking of high-performance chips
Five year program aimed at creating next-gen nanoscale devices
50% lower power consumption than on 10nm, may beat TSMC to market
Full EUV planned, announces four partners for back-end design services
Running out of capacity on 14nm with 10nm still a year away
3D stacking, AI and EUV should all help push transistors toward 3 and 2nm nodes, say TSMC
Will stick to 14nm, citing high development costs and low customer demand on 7nm
Apple taking a risk by putting all the eggs in one basket for the next two years
TSMC, UMC and Powerchip account for 62% of global market