Blog: Entering the Age of the Monster Chip
What are the system designs that require a leap in SoC complexity? It's not only big datacenter artificial intelligence (AI)…
Ceva Reveal New AI Processor Architecture
Ceva rolled out the second-generation AI processor architecture scalable from 2 to 100 TOPS and CDNN-Invite API, an interface that…
Integrated 5G Chips Unveiled by Samsung, Huawei and Qualcomm
5G gets boost from mobile processors integrated with modem in SoC, and platform with integrated RF system.
Xilinx Develops World’s Largest FPGA
Xilinx broke its own record by a factor of 1.6X
AVs & EDA Speaking the Same Language
Foretellix co-founders believe car OEMs cannot verify the safety of an AV through miles-driven only. They focus on the quality…
RISC-V: Not Just an Academic Project
The recent RISC-V Workshop in Zurich gave us a glimpse of where we are in its evolution
RISC-V Adoption to get a Boost from FreeStart
The company has implemented a program that enables designers to try RISC-V for free using its N22 core, with no…
SoC Interconnect: DIY Equals Danger
With so many acquisitions in the interconnect IP market, you might be forgiven for thinking DIY interconnect is a good…
Where Does NXP Stand on its AI Strategy?
NXP's AI strategy has been a mystery since CEO Richard Clemmer revealed in 2016 the company has had "no internal…
Mediatek to Challenge with New 5G SoC
Taiwanese firm rolls its first 5G SoC, says it's no longer a fast follower to Qualcomm