Multi-channel demodulator cores support FPGAs

RF Engines Ltd. (RFEL) has announced that it is designing multi-channel demodulator core solutions for FPGAs. Some RFEL customers using its multi-channel channeliser solutions have asked the digital RF channeliser expert to turn its attention to a new generation of demodulator cores that “efficiently complement the channelisers.”

Some of the applications planned include one targeting more than 50 channels in a single Xilinx Virtex-II FPGA and another addressing more than 120 channels in a Virtex 6 device.

Building blocks are typical demodulation functions such as symbol timing recovery, fine frequency/phase estimation and correction and SNR estimation. At RFEL, these functions are now combined to support multiple demodulation schemes simultaneously to provide parallel soft-symbol data stream outputs.

RFEL, whose high-performance cores can be mapped onto low-end, low-cost FPGAs, as well as the most advanced FPGAs, said it will release demodulator functions as standalone IP to allow its customers to integrate them in their designs. The demodulator cores are slated to be released for licensing in late 2010.