Are There Better Ways to Stack DRAM?

Article By : Gary Hilson

With a new patent and technology license agreement, will Xperi's DBI stacking technology drive down costs for wider adoption?

TORONTO — Stacking isn’t new, but one company believes it has a better way of doing it that could be applied to DRAM, and it is transferring the technology to memory makers.

Xperi Corporation, a company that represents a broad portfolio of technology intellectual property, including Tessera and Invensas, recently announced a new patent and technology license agreement with SK Hynix for access to its portfolio of semiconductor IP. The transfer includes the Invensas DBI Ultra 3D interconnect technology focused on next-generation memory.

In a telephone interview with EE Times, Invensas president Craig Mitchell said the company’s DBI Ultra platform has the potential to allow the semiconductor industry to extend beyond Moore’s Law by making it possible to manufacture 8-, 12- and even 16-layer chip packages. The company has several versions of its direct bond interconnect (DBI) technology that bonds two wafers together and that can be applied to sensors, NAND, and DRAM. “As we look at the semiconductor space moving forward, 3D is becoming so much more important.”

DBI Ultra enables low-temperature, low-profile die-to-wafer and die-to-die hybrid bonding that allows for a thinner stack than conventional approaches by eliminating the need for copper pillars and underfill. It also allows the stacking of known good die — that are the same or different sizes, processed on fine or coarse wafer process technology nodes, or manufactured on the same or different wafer sizes — while readily scaling down to 1 µm interconnect pitch.

The DBI technology first saw traction with small image sensors that must be especially thin, said Mitchell, and now the company is focused on expanding the process into other markets and other applications, including 3D NAND and DRAM. On the NAND side, he said, the main driver is improving costs while reducing power consumption to further scale.

Invensas’ DBI 3D integration technology has the potential to optimize the manufacturing process of NAND through periphery logic and memory array segregation — and to potentially offer a more cost-effective way to stack DRAM than what is currently being done with HBM.

With high bandwidth memory (HBM) that uses DRAM, there’s a desire to increase the number of connections, said Mitchell, and high performance means more bandwidth. “The number of connections between devices is increasing. They don’t want to increase the die side, so they’re looking at getting the distance between connections smaller and smaller. And this type of technology allows them to scale that down to a very fine pitch.”

Mitchell said the goal is to better scale bandwidth interconnect and to get more into a given area as DRAM market and HBM continue to stack more and more devices — as high as 16 in some cases. “When you have those tall stacks, the performance can be very different on the bottom of the stack from the top of the stack just from a thermal perspective.” DBI Ultra addresses this issue by having no gaps between, he said.

As a broad concept, stacking isn’t new and it’s hard to tell if what Xperi has with the Invensas IP will be a significant step forward, said Jim Handy, principal analyst with Objective Analysis, noting that Tessera is also a part of the Xperi portfolio. Tessera first announced a new way of packaging memory chips back in the 1990s and touted it as a better way than what was being done at the time, he said, and Xperi is essentially doing the same thing. “They’ve got some way of stacking ships, and so they’re looking for opportunities that need to have stacking.”

Handy said the adage of having a hammer means everything looks like a nail comes to mind, and it seems like suddenly the answer to everything is a stacked chip. “Whether it does or not is a whole different matter.” There definitely are applications that like stacked chips, he said, such as cellphones — because they take up little space — but makers are not willing to pay the premium. Stacked chips improve the speed dramatically in HBM for those willing to pay the higher cost.

Ultimately, the value of the Xperi stacking technology will be whether the volume can hit a point where it drives down the costs enough for wider adoption, said Handy. “Then it might end up finding its way down into the more cost-sensitive applications, like cellphones.”

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